References

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  2. ^Attarzadeh Niaki, Seyed Hosein and Sander, Ingo, Co-simulation of embedded systems in a heterogeneous {MoC-based} modeling framework, 2011 6th {IEEE} International Symposium on Industrial Embedded Systems {(SIES)}, 10.1109/SIES.2011.5953667, {IEEE}, June, 2011, inproceedings, 978-1-61284-818-1, 238--247,
  3. ^Axel Jantsch, Richard Zurawski, Models of Computation for Distributed Embedded Systems, Networked Embedded Systems, CRC Press/Taylor & Francis, 2008, incollection,
  4. ^Deepak Mathaikutty and Hiren Patel and Sandeep Shukla and Axel Jantsch, {EWD}: A Metamodeling Driven Customizable Multi-MoC System Modeling Framework, ACM Transactions on Design Automation of Embedded Systems, 12, 3, August, 2007, 12, article,
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  5. ^Deepak Mathaikutty and Hiren Patel and Sandeep Shukla and Axel Jantsch, {SML-Sys}: A Functional Framework for Multiple Models of Computation for Heterogeneous System Design, Design Automation for Embedded Systems, Springer, 2008, article,
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  6. ^Deepak Abraham Mathaikutty and Hiren Patel and Sandeep K. Shukla and Axel Jantsch, Alain Vachoux, {UMoC++}: A {C++}-Based Multi-{MoC} Modeling Environment, Advances in Design and Specification Languages for SoCs - Selected Contributions from FDL'05, Springer Verlag, 2006, 7, incollection,
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  8. ^Axel Jantsch and Ingo Sander, Models of Computation and languages for embedded system design, IEE Proceedings on Computers and Digital Techniques, 152, 2, March, 2005, 152, article, 114-129,
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  9. ^Axel Jantsch and Ingo Sander, Bashir M Al-Hashimi, Models of Computation in the Design Process, {SoC}: Next Generation Electronics, IEE, 2005, incollection,
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  11. ^Axel Jantsch, Modeling Embedded Systems and {SoCs} - Concurrency and Time in Models of Computation, Systems on Silicon, Morgan Kaufmann Publishers, June, 2003, book,
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  14. ^Tarvo Raudvere and Ingo Sander and Axel Jantsch, Application and Verification of Local Non-Semantic-Preserving Transformations in System Design, {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, 27, 6, June, 2008, 27, article, 1091--1103,
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  15. ^Ingo Sander and Axel Jantsch, Modelling Adaptive Systems in {ForSyDe}, Electronic Notes in Theoretical Computer Science (ENTCS), 200, 2, Elsevier Science Publishers B. V., 2008, 200, article, 39--54,
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  17. ^Tarvo Raudvere and Ingo Sander and Axel Jantsch, Synchronization after design refinements with sensitive delay elements, International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS), October, 2007, inproceedings,
  18. ^Zhonghai Lu and Jonas Sicking and Ingo Sander and Axel Jantsch, Using synchronizers for refining synchronous communication onto hardware/software architectures, Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP'07), May, 2007, inproceedings,
  19. ^Tarvo Raudvere and Ingo Sander and Axel Jantsch, A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops, Proceedings of the 17th Great Lakes Symposium on VLSI (GLSVLSI '07), 2007, inproceedings, 353-358,
  20. ^Zhonghai Lu and Ingo Sander and Axel Jantsch, Towards performance-oriented pattern-based refinement of synchronous models onto {NoC} communication, Proceedings of the 9th Euromicro Conference on Digital System Design (DSD'06), August, 2006, inproceedings,
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  21. ^Zhonghai Lu and Ingo Sander and Axel Jantsch, Refining synchronous communication onto network-on-chip best-effort services., Advances in Design and Specification Languages for {SoCs} - Selected Contributions from {FDL} 2005, Springer Verlag, April, 2006, incollection,
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  22. ^Zhonghai Lu and Ingo Sander and Axel Jantsch, Refinement of a perfectly synchronous communication model onto {Nostrum NoC} best-effort communication, Proceedings of the Forum on Specification and Design Languages (FDL'05), September, 2005, inproceedings,
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  23. ^Jonas Sicking, Implementation of Asynchronous Communication for {ForSyDe} in Hardware and Software, Institute of Microelectronics and Information Technology, Royal Institute of Technology (KTH), 2005, mastersthesis,
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  25. ^Tarvo Raudvere and Ashish Kumar Singh and Ingo Sander and Axel Jantsch, Polynomial abstraction for verification of sequentially implemented combinational circuits, Design, Automation and Test in Europe Conference (DATE 2004), February, 2004, inproceedings,
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  26. ^Ingo Sander and Axel Jantsch and Zhonghai Lu, Development and Application of Design Transformations in {ForSyDe}, {IEE} Proceedings - Computers & Digital Techniques, 5, September, 2003, 5, article, 313--320,
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  27. ^Tarvo Raudvere and Ingo Sander and Ashish Kumar Singh and Axel Jantsch, Verification of design decisions in {ForSyDe}, Proceedings of the 1st International Conference on Hardware - Software Codesign and System Synthesis (CODES+ISSS), October, 2003, inproceedings,
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  28. ^Ingo Sander, System Modeling and Design Refinement in {ForSyDe}, Royal Institute of Technology, April, 2003, phdthesis,
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  29. ^Ingo Sander and Axel Jantsch and Zhonghai Lu, Development and Application of Design Transformations in {ForSyDe}, Design, Automation and Test in Europe Conference (DATE 2003), March, 2003, inproceedings, 364--369,
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  30. ^Ingo Sander and Axel Jantsch, Transformation Based Communication and Clock Domain Refinement for System Design, 39th Design Automation Conference ({DAC 2002}), June, 2002, inproceedings, 281--286,
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  32. ^Ingo Sander and Axel Jantsch, Formal System Design Based on the Synchrony Hypothesis, Proceedings of the 12th international conference on {VLSI} Design, January, 1999, inproceedings, 318-323,
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  33. ^Ingo Sander and Axel Jantsch, System Synthesis Based on a Formal Computational Model and Skeletons, Proceedings {IEEE} Workshop on {VLSI}'99, {IEEE Computer Society}, April, 1999, inproceedings, 32--39,
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  34. ^Ingo Sander and Axel Jantsch, System Synthesis Utilizing a Layered Functional Model, Proceedings Seventh International Workshop on Hardware/Software Codesign, ACM Press, May, 1999, inproceedings, 136--140,
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