Changes between Version 18 and Version 19 of WikiStart
 Timestamp:
 03/02/12 10:09:11 (6 years ago)
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WikiStart
v18 v19 5 5 6 6 == Overview == 7 ForSyDe (Formal System Design) is a methodology with a formal basis for designing heterogeneous embedded systems which is supported by a set of tools, modeling libraries, and related documentation. ForSyDe uses the theory of [[ModelsOfComputationModels of Computation (MoCs)]] to capture the [[ SpecificationModelspecification model]] of a heterogeneous system. Such a system can be refined using a set of well defined [[DesignTransformationsDesign Transformations]] to get an ''implementation model''. ''Implementation mapping'' can then be used to generate software or hardware from the refined model. ForSyDe models can also be cosimulated with legacy code and external IP blocks using the concept of [[Wrappers]] .7 ForSyDe (Formal System Design) is a methodology with a formal basis for designing heterogeneous embedded systems which is supported by a set of tools, modeling libraries, and related documentation. ForSyDe uses the theory of [[ModelsOfComputationModels of Computation (MoCs)]] to capture the [[ForSyDe/SpecificationModelspecification model]] of a heterogeneous system. Such a system can be refined using a set of well defined [[DesignTransformationsDesign Transformations]] to get an ''implementation model''. ''Implementation mapping'' can then be used to generate software or hardware from the refined model. ForSyDe models can also be cosimulated with legacy code and external IP blocks using the concept of [[Wrappers]] . 8 8 9 9 == Tools and Libraries ==