Changes between Version 18 and Version 19 of WikiStart


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Timestamp:
03/02/12 10:09:11 (6 years ago)
Author:
ingo
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  • WikiStart

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    66== Overview == 
    7 ForSyDe (Formal System Design) is a methodology with a formal basis for designing heterogeneous embedded systems which is supported by a set of tools, modeling libraries, and related documentation. ForSyDe uses the theory of [[ModelsOfComputation|Models of Computation (MoCs)]] to capture the [[SpecificationModel|specification model]] of a heterogeneous system. Such a system can be refined using a set of well defined [[DesignTransformations|Design Transformations]] to get an ''implementation model''. ''Implementation mapping'' can then be used to generate software or hardware from the refined model. ForSyDe   models can also be co-simulated with legacy code and external IP blocks using the concept of [[Wrappers]]  . 
     7ForSyDe (Formal System Design) is a methodology with a formal basis for designing heterogeneous embedded systems which is supported by a set of tools, modeling libraries, and related documentation. ForSyDe uses the theory of [[ModelsOfComputation|Models of Computation (MoCs)]] to capture the [[ForSyDe/SpecificationModel|specification model]] of a heterogeneous system. Such a system can be refined using a set of well defined [[DesignTransformations|Design Transformations]] to get an ''implementation model''. ''Implementation mapping'' can then be used to generate software or hardware from the refined model. ForSyDe   models can also be co-simulated with legacy code and external IP blocks using the concept of [[Wrappers]]  . 
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    99== Tools and Libraries ==